1. Field
Exemplary embodiments of the present invention relate to an impedance control circuit that generates an impedance control code for controlling an impedance value, and a semiconductor device that determines the termination impedance value of an interface pad using the generated impedance control code.
2. Description of the Related Art
As a semiconductor device may operate at a high speed, the swing between logical voltage levels of a signal exchanged between semiconductor devices is decreased to minimize a delay time induced in a signal transmission procedure. However, as the swing between logical voltage levels of a signal is decreased, influence of noise increases, and a reflection of a signal due to an impedance mismatch on an interface between semiconductor devices may impact a semiconductor operation. The impedance mismatch is caused due to external noise, variations in power supply voltage, operating temperature, a change in manufacturing process, etc. Due to the impedance mismatch, high speed transmission of data becomes difficult and output data may be distorted.
Therefore, in a semiconductor device that operates at a high speed, a termination circuit is adopted adjacent to an input pad of a chip. The termination circuit is called an on-die termination circuit. In general, in an on-die termination scheme, a transmission unit performs source termination by an output circuit, and a reception unit performs parallel termination through a termination circuit that is connected in parallel to a reception circuit connected with the input pad.
ZQ calibration is a procedure performed in a ZQ node as a node for calibration, and ZQ calibration is a procedure for generating calibration codes that change according to PVT (process, voltage and temperature) conditions. Using the codes generated as a result of ZQ calibration, the impedance value of a termination circuit, more specifically, the impedance value of an interface pad (for example, an input/output pad) in a semiconductor memory device is controlled.
FIG. 1 illustrates a conventional ZQ calibration circuit.
Referring to FIG. 1, the conventional ZQ calibration circuit includes a reference voltage generator 10, a comparison unit 20, a counter unit 30, and an impedance unit 40.
A reference voltage generator 10 outputs a reference voltage V_REF. The comparison unit 20 compares the level of the reference voltage V_REF and the level of a voltage V1 of an impedance node, generates an up/down signal UP/DN indicating whether the reference voltage V_REF or the voltage V1 is greater, and outputs the up/down signal UP/DN to the counter unit 30. The counter unit 30 performs a counting operation of increasing or decreasing the value of a impedance control code DGT_CODE<0:N> in response to the up/down signal UP/DN. The controlled impedance control code DGT_CODE<0:N> are outputted to the impedance unit 40. The impedance unit 40 performs termination for the impedance node with the impedance value determined by the impedance control code DGT_CODE<0:N>. This procedure is repeated until the level of the voltage V1 at the impedance node becomes the same as the level of the reference voltage V_REF.
FIG. 2 illustrates a procedure where the voltage V1 at the impedance node approaches the reference voltage V_REF by calibration operations shown in FIG. 1.
Referring to FIG. 2, since a plurality of impedances constituting the impedance unit 40 are controlled by the impedance control code DGT_CODE<0:N> as digital signals, a bang-bang error occurs. The bang-bang error indicates a phenomenon where the voltage at the impedance node does not precisely correspond to the level of the reference voltage V_REF during a calibration operation, and the voltage at the impedance node rises and falls in a stepwise manner when viewed with respect to the reference voltage V_REF.
Consequently, as the calibration operation is performed using the impedance control code DGT_CODE<00:N> as digital signals, the level of the voltage V1 at the impedance node is difficult to control to precisely correspond to the level of the reference voltage V_REF, as in the case of occurrence of a bang-bang error.